PLAKHTII, O.; DOMNIN, I.; BAHACH, R.; LATVYNSKYI, V. Analysis of linearization limit conditions and automated synthesis of the output voltage regulator of a PWM-buck converter in MATLAB/SIMULINK. Electrical Engineering and Power Engineering, [S. l.], n. 4, p. 47–56, 2025. DOI: 10.15588/1607-6761-2025-4-6. Disponível em: https://ee.zp.edu.ua/article/view/346105. Acesso em: 30 dec. 2025.